1. Field of the Invention
This invention generally relates to a method for fabricating a semiconductor device, and more particularly to a dynamic random access memory (DRAM) cell and a method fabricating the same.
2. Description of Related Art
Capacitor plays an important role in storing data in a memory cell. The more charges the capacitor stores, lesser the noise will affect the reading/writing process for a memory cell. There are several ways to increase the capacitance such as increasing the surface area of the capacitor. However, this also increases the size of the memory device. How to increase the capacitance without increasing the size of the memory device is an important issue, especially when the integration level is getting higher and higher.
A conventional deep trench capacitor has been widely used in memory devices as shown in FIG. 1. FIG. 1 is a cross-sectional view of a DRAM cell with a deep trench capacitor.
Referring to FIG. 1, the conventional DRAM cell includes a deep trench capacitor 140 and a transistor 150. The deep trench capacitor 140 is configured inside the substrate 100. The deep trench capacitor 140 includes polysilicon layers 106a, 106b, and 106c in the deep trench 110 as the upper electrode, an buried electrode region 102 as the bottom electrode at the periphery of the deep trench 110, and a capacitor dielectric layer 104 between the upper and bottom electrodes. The deep trench capacitor 140 uses the polysilicon layers 106a, 106b, and 106c as the upper electrode. Further, the buried electrode regions 102 and 112 are implanted inside the substrate 100. To form this structure, the manufacturing process is very complex. Further, the conventional DRAM cell includes the transistor 150. The transistor 150 includes a gate electrode 130 above the substrate 100 and the drain/source regions 132 in the substrate 100 beside the two sides of the gate electrode 130. A collar oxide layer 108 is also disposed between the polysilicon layer 106b and the substrate 100 to isolate the polysilicon layer 106b and the buried electrode region 112. A buried strap 114 is further disposed in the substrate 100 adjacent to the polysilicon layer 106c. Hence, how to simplify the structure and the manufacturing process of the DRAM cell is an important issue. Further, since the deep trench capacitor is deep, a capacitor with a larger cross section is required to facilitate the filling of the polysilicon layers. Ultimately, the size of the conventional deep trench capacitor cannot be reduced with the increase of the integration level.